In the microcontroller as the core of the measurement and control system. Microcontrollers often need two or more serial ports to communicate with other hosts or peripherals. How to make the system have multiple serial interfaces is a universal problem. In the aerospace field, in particular, serial communications are commonly used in avionics such as GPS, atmospheric data systems, digital compasses, radio altimeters, and even gyros. Single-chip computer systems need to have multiple serial ports to meet external communication requirements. The need for information exchange.
Commonly used multi-serial port design method
1 selection of multi-port microcontroller
Directly using multiple serial port microcontrollers as the system's CPU is obviously the most direct and effective method. There are many new CPUs equipped with two or more serial ports, such as W77E58, DS80C320, MSP430F149, C8051F020 microcontrollers and digital signal processors TMS320C30 have two serial ports, and cygnal C8051F series microcontrollers have 4-5 full Duplex asynchronous serial port.
2 I/O simulation serial port with CPU
When the baud rate of the serial port is set to 9600 baud, it takes about 100us to transmit one bit. For the general MCU, the software timer is fully capable of simulating the serial port timing according to the asynchronous serial communication protocol. So, using the CPU's two I/O ports and a software timer, you can simulate a serial port purely with software. The literature describes a specific implementation method. When sending, only one bit of data can be output in time series. When receiving, first use the external interrupt to detect the initial level on the I/O receiving port, and then use the timer. Delay the reception of the first bit of data by a half-bit length of time, and then read the other bit's signal by the time delay of one bit.
3 Software serial port based on high speed input and output
The 80C196 series microcontrollers are equipped with high speed input HSI and high speed output HSO interface. HSI and HSO can be used to simulate the serial port. The output of the data uses HSO. As long as the delay time corresponding to the baud rate is written in the timer of the HSO, each time the HSO interrupts, a data bit is output until the output of the stop bit is completed. When receiving, use HSI's own signal transition detection function to detect the start bit and generate an interrupt to notify the CPU to start receiving data. The subsequent data bits are read by the software timer at the baud rate. The literature introduced the implementation method in detail, and gave the complete program code; This method is in 80C196MC/MD one-chip computer. It shows the application of the event processing array EPA and the peripheral transaction server PTS. The advantage is that each module of the EPA corresponds to the specified pin of the CPU, which reduces the software overhead and the complexity of the program design.
416C550 Series Programmable Communication Controller
There are many types of interface chips that use the parallel port to extend the serial port. Among them, 16C550 series communication controllers are commonly used in computer control systems and communication equipments to realize communication between the CPU and serial ports and MODEM. The 16C550 has a serial port, the 16C552 has two serial ports, and the 16C554 has four serial ports. The essence of 16C550 series devices is to realize the conversion of serial port and CPU parallel port, and it has strong digital logic function. The 16C550 series devices have programmable serial ports, and some also have digital input/output interfaces, which can be used as CPU expansion and expansion interfaces.
5 Convert Parallel Ports to Serial Ports Using Discrete Devices
The literature provides a circuit that utilizes discrete components such as 555 timers, D flip-flops, and shift registers to implement serial and parallel conversions. The circuit uses a timer to generate a synchronous clock signal with a baud rate, shifts the received data to a parallel port for reading by the CPU, or shifts the data of the parallel port, essentially emulating a number of discrete components. 16C550 features.
6 serial port expansion chip
Now there is a special SP series serial port expansion chip that can extend all the way to a high-speed full-duplex serial port to multiple low-speed full-duplex serial ports. The baud rate of the serial port is determined by the crystal oscillator. For example, the SP2328 and SP2338 can expand the serial port of a female mother into a three-way sub-serial port. The SP2538 can expand the serial port of the female bus to a five-way sub-serial port. This series of chips have input address lines and output address lines. When sending data through the female serial port to the sub-serial port, select the output address line, determine the sub-serial output, and read from the sub-serial port through the female serial port. When the data is detected, the level of the input address line is checked to determine which sub-serial signal it is. This series of chips should use a time-sharing mechanism to decompose one way of data into multiple channels or synthesize multiple channels of data into one through an internal logic circuit. For example, the baud rate of the SP2328 female serial port is four times that of the sub-serial port, and the baud rate of the SP2538 female serial port is six times the baud rate of the sub-serial port.
7 Expanding the Serial Port with a Multiplexer
The literature provides a method of using the multiplexer MAX353 to expand a serial port into two channels. When the signal is sent, the CPU first gives the port selection address of the MAX353. The serial signal is switched by the multiplexer and sent from the specified channel. When receiving the signal, the multiplexer defaults to the first channel and the second serial port's RXD2 is simultaneously received (on the 2PU's external interrupt pin. If the first channel has data, it is directly received. The second channel has data. The start bit of RXD2 will generate an external interrupt, the CPU will enter the interrupt response program, and the multiplexer will switch to the second channel to receive the data of RXD2. After receiving one byte, the multiplexer will switch. Back to the first passage.
The method of the literature occupies an external interrupt and can only extend one serial port to two channels. Based on the same idea, four multiplexers can be used to expand one serial port to more than two channels. send
The data operation process is the same as above. In order to achieve data reception, a channel selection circuit needs to be designed with a programmable logic device, a latch, and an encoder, which way has a start bit and which way the multiplexer is strobed. The CPU determines the channel number of the received data based on the output of the channel selection circuit.
8 Designing Serial Ports Using FPGA/CPLD
FPGA/CPLD has powerful circuit simulation capabilities. FPGA/CPLD can be used to design the parallel port serial port sequential logic circuit. This circuit is generally composed of four parts: bus interface and control logic part, baud rate generation part, shift output and latch part, shift input and Latch part. The baud rate of this circuit can be adjusted, there are chip selection lines and read and write lines. The CPU accesses the circuit through the parallel port. In essence, this circuit simulates the serial interface function of the programmable controller 16C550. In fact, FPGA/CPLD has great flexibility. The circuit can be properly tailored according to actual needs and system resources, and multiplexing or time division multiplexing can also be applied to serial port simulation.
The Comparative Study and Selection of Multi-Serial Port Design Methods
The above 8 methods have their own advantages and disadvantages. Obviously, choosing a serial port CPU is the most direct and effective method, but choosing a new type of CPU has a certain development risk for developers, and sometimes it is limited by the supply channels and development conditions. The use of a dedicated chip is one of the most reliable serial external expansion methods, and has many advantages such as mature technology and low software workload. The disadvantages are increased hardware costs, increased size, and sometimes external sources of interrupt. Use multiplexers. The advantage is that the CPU can achieve point-to-multipoint communication, low cost of software and hardware, and high reliability. The fatal disadvantage is that the CPU cannot receive multiple input data at the same time. The use of FPGA/CPLD can not only design the serial interface itself, but also can be used to implement multiple serial port switching, or to manage the interrupt sources of multiple serial interface chips. The advantages are high reliability and low CPU software overhead. The disadvantages are slightly higher development costs and higher hardware costs. The use of discrete components to achieve the serial port conversion, the advantage is that the software workload is small, the lack of a complex circuit, poor reliability, to occupy the external interrupt source. Using software to simulate the serial interface, its advantages are self-evident. Neither adds any hardware nor consumes external interrupt sources. The disadvantages are high software complexity, large CPU overhead, and software timers.
The above eight kinds of multi-serial design methods can be summarized into five design ideas:
1 directly from the CPU up and down, choose more than one serial port microcontroller;
2 Mining the resources of the device itself, simulate the serial port with software on the CPU I/O line;
3 Use functional circuits to achieve serial and parallel conversions;
4 Use a functional circuit to decompose a high-speed serial port into multiple low-speed serial ports;
5 through the time-division multiplexing to achieve one-to-multi-way switching.
For these different design concepts and their specific implementation methods, how to choose the application, not only based on the above methods of hardware and software complexity, CPU time overhead, real-time and reliability, but also based on the application system The total number of serial interfaces required, the independence of each serial port, and the baud rate, as well as the existing development conditions and comprehensive cost indicators. When selecting, comprehensive considerations should be made according to various factors. It is necessary to make full use of existing resources, reduce the complexity of the system, and improve reliability on the basis of achieving the required functions, and strive to minimize design costs and overall costs. Of course, the choice of these methods should be flexible, and there is no need to stick to one method, and a combination of several methods can be chosen according to local conditions.
Application examples
In the design of a drone flight controller, the CPU is selected 80C196KC. The original serial port on the CPU is used for remote telemetry. In order to measure the aircraft's heading angle. The digital compass HMR3000 is used in the system. The sensor is a serial interface with a baud rate of 19200. The output data is in the NMEAC183 format, 20 frames per second and 35 bytes per frame. To do this, a full-duplex asynchronous serial interface needs to be added to the controller.
Based on the comparison and analysis of the above eight design methods, after weighing the hardware and software complexity of the system, the fourth method was selected, namely, using the 16C550 programmable communication controller to expand a serial port. Specially communicates with this sensor. The 16C550 uses the FIFO function to make an interrupt request to the CPU after receiving 14 bytes. In this way, the CPU can receive all frame attitude measurement data at most 4 times. The controller's software decodes the output data of a frame of HMR3000 for only 1.187ms, and the burden on the CPU is not great. The connection circuit of CPU, 16C550 and HMR3000 is shown as in Fig. 1.
Figure 1 Interface circuit diagram of programmable communication controller 16C550 and single-chip microcomputer system
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