
The HMC is a new memory architecture scheme using a TSV (through silicon via) technology to stack multiple chips together and use a logic layer to control it. The memory bandwidth can be greatly increased, and the energy efficiency ratio is 7 times that of the current low voltage version of DDR3 memory, and the performance is 15 times as much.
The biggest challenge for HMC technology is the actual packaging of memory. It is believed that there will be corresponding solutions under the joint efforts of leading Intel, Micron, and Samsung in the industry.
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